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AR# 11068

3.5 FPGA Express - Negative clock edge flip-flop not using available resources in 4K design

Description

Keywords: FPGA Express, flip-flop, flip, flop, negative, neg, clock, clk, 4K, Spartan-XL

Urgency: Standard

General Description:
When a 4K design (Spartan or Spartan-XL included) contains exclusively
negative edge-triggered flip-flops, FPGA Express will insert an INV primitve
before the BUFG. This causes the implementation tools to use an FMAP before
the signal gets routed to the BUFG instead of using the dedicated clock
inverter on the flip-flop.

This is not a problem if your design contains a mix of positive and negative
edge triggered flip-flops.

This problem does not occur with Virtex designs (Spartan-II included).

Solution

1

If your design contains only negative edge flip-flops, then the work-around is
to instantiate a BUFG in your design; then, invert the clock after the BUFG.
This will cause FPGA Express to put the INV primitive after the BUFG, which
allows the implementation tools to push the INV primitive onto the inverted
clock input of the flip-flop.

Other problems that exist with FPGA Express and BUFGs are documented in
(Xilinx Solution 9649) and (Xilinx Solution 10127).

Also, FPGA Express may not insert IPADs on BUFGs in 4K designs. The
work-around for this problem is documented in (Xilinx Solution 9691).

2

If both positive and negative edge flip-flops exist in your 4K design, FPGA Express
may buffer (insert a BUFG) the clock again after inserting an INV primitive. To avoid
this problem open, FPGA Express' constraints editor, select the "Xilinx Options" tab,
and de-select "Buffer internal nets". By doing this, any net that could possibly have
a BUFG inserted on it (such as internally generated clocks) will not get a BUFG.

Other problems that exist with FPGA Express and BUFGs are documented in (Xilinx
Solution 9649) and (Xilinx Solution 10127).

Also, FPGA Express may not insert IPADs on BUFGs in 4K designs. The work-around
for this problem is documented in (Xilinx Solution 9691).
AR# 11068
Date Created 02/26/2001
Last Updated 08/21/2002
Status Archive
Type General Article