We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 11125

3.1i Virtex MAP - An XORCY is mistaken for a LUT, which leads to a pack error.


Keywords: XORCY, LUT, pack error, ERROR:Pack:679

Urgency: Standard

General Description:
In the following pack error, "U1/U1/BU2" is actually an XORCY, so the RLOC should be valid:

ERROR:Pack:679 - Unable to obey design constraints (MACRONAME = U1/U1/hset,
RLOC = R6C0.S1) which require the combination of the following symbols into a single slice component:
LUT symbol "U1/U1/BU0" (Output Signal = U1/U1/N46)
LUT symbol "U1/U1/BU2" (Output Signal = P75BP<0>)
LUT symbol "U1/U1/BU3" (Output Signal = U1/U1/N66)
MUXCY symbol "U1/U1/BU4" (Output Signal = U1/U1/N82)
XORCY symbol "U1/U1/BU5" (Output Signal = P75BP<1>)
There are more than two function generators. Please correct the design constraints accordingly.


This problem is fixed in the latest 3.1i Service Pack. available at:
The first service pack containing the fix is 3.1i Service Pack 8.
AR# 11125
Date Created 03/04/2001
Last Updated 08/19/2002
Status Archive
Type General Article