Description

What are the simultaneously switching outputs (SSO) guidelines for Virtex-E, Virtex-II, and Virtex-II Pro, Virtex-4, Virtex-5 devices?

Solution

For a detailed discussion about handling SSOs, please refer to (Xilinx XAPP689), Managing Ground Bounce in Large FPGAs. The SSO guidelines pointed to below are to be used in conjunction with the methodology outlined in the Application Note.

Virtex-5

http://www.xilinx.com/support/documentation/user_guides/ug190.pdf
See the Simultaneous Switching Output Limits Section

Virtex-4

Refer to the Virtex-4 FPGA User Guide at:

http://www.xilinx.com/support/documentation/user_guides/ug070.pdf
See the Nominal SSO Limit Section

Virtex-II Pro

Refer to the Virtex-II Pro and Virtex-II Pro X FPGA User Guide at:

http://www.xilinx.com/support/documentation/user_guides/ug012.pdf
See Simultaneous Switching Guidelines

Virtex-II

Refer to the Virtex-II Platform FPGA User Guide at:

http://www.xilinx.com/support/documentation/user_guides/ug002.pdf
See Simultaneous Switching Output (SSO) Guidelines

Virtex-E

Refer to the Detailed Functional Description data sheet at:

http://www.xilinx.com/support/documentation/data_sheets/ds022-2.pdf
Select Using Select I/O -> Design Considerations -> Simultaneous Switching Guidelines.

NOTE: The SSO guidelines for HSTL18 ( HSTL with VCCO = 1.8V) are not yet listed. For now, use the regular HSTL (with VCCO = 1.5V) guidelines and reduce by 25%. For more information on HSTL 1.8V support, refer to (Xilinx Answer 9762).