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AR# 11776

HDL Bencher - ModelSimXE reports "ERROR: file_tb.vhd(line#): Prefix of index must be an array" when compiling for simulation

Description

Keywords: HDL Bencher, Prefix, array, ModelSimXE, index, read, write

Urgency: Standard.

General Description:
When I run an HDL Bencher-generated testbench in ModelSimXE, the following error (or multiple instances of it) is reported:

"ERROR: file_tb.vhd(line#): Prefix of index must be an array".

The syntax of the HDL seems to be correct; however, in the line number mentioned in the error, there may be references to reserved "signals" that are used by HDL Bencher.

Solution

As Ports and Signals cannot have the same names in VHDL; if this is the case, change the Port names of the modules you wrote. (Check for this in the testbench.)

Additionally, check for reserved words such as "Read" or "Write".
AR# 11776
Date Created 06/13/2001
Last Updated 12/11/2006
Status Archive
Type General Article