We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 11862

3.6 FPGA Express - When synthesis optimization is changed from speed to area, speed is being reported in the optimization reports


Keywords: FPGA, Express, optimization, speed, area, report, synthesis

Urgency: Standard

General Description
When the synthesis options are changed from speed to area, the report lists the optimization as the speed.


This is only a reporting problem; the synthesis tool has actually synthesized according to the option that was set.
AR# 11862
Date Created 06/27/2001
Last Updated 08/11/2003
Status Archive
Type General Article