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AR# 12072

4.1i Project Navigator - VHDL "generate" statements are not supported for all processes in Project Navigator


Keywords: generate, VHDL, process, code

Urgency: Standard

General Description:
Processes such as "Create Schematic Symbol", "View VHDL Instantiation Template", and "New Source -> VHDL Testbench" fail because the VHDL "generate" statements are not supported by VHDL Analyzer.


The "generate" statement must be removed from the code in order to use these processes.

This issue was resolved in the 5.1i software release.
AR# 12072
Date Created 07/26/2001
Last Updated 08/11/2003
Status Archive
Type General Article