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AR# 12649

4.1i CPLD Project Navigator - The ABEL BLIF synthesis flow is now obsolete


Keywords: 4.1i, Project Navigator, CPLD, ABEL, BLIF

Urgency: Standard

General Description:
The ABEL BLIF flow has been made obsolete; it has been replaced with the ABEL-XST VHDL and ABEL- XST Verilog flows.


For CoolRunner, the default optimization strategy was accidentally changed from Density (in WebPACK 3.x) to Balanced (in WebPACK and ISE 4.x). If you find that your design does not fit as well, please use density optimization to make a fair comparison.

If you find that you still need to use the ABEL-BLIF synthesis flow, please open a case with the Xilinx hotline by going to http://support.xilinx.com and clicking on the WebCase link on the left toolbar.
AR# 12649
Date Created 09/24/2001
Last Updated 08/06/2003
Status Archive
Type General Article