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AR# 12806

6.1i PrimeTime - Why does Xilinx support equivalency checking?


Keywords: equivalence, equivalency, checking, 4.1i, 5.1i

Urgency: Standard

General Description:
Why does Xilinx support equivalency checking?



With device size and design complexity both increasing, functional simulation is becoming very time-consuming for both testbench generation and simulation run-time. Formal verification is attractive because of its short run-time and complete functional coverage.

In addition, formal verification is a proven technology in the ASIC design environment. As more ASIC designers begin to design with FPGAs, formal verification is becoming an increasingly important flow for design.


For related PrimeTime information, please also see the following Answer Records:

(Xilinx Answer 12802) - "What is formal verification?"
(Xilinx Answer 12803) - "What types of users will be interested in the formal verification flow?"
(Xilinx Answer 12804) - "Does Xilinx support equivalence checking and model checking?"
(Xilinx Answer 12805) - "Does Xilinx support equivalency checking for RTL-to-RTL, RTL-to-Gate, or Gate-to-Gate?"
(Xilinx Answer 12807) - "Does Xilinx plan to support model checking?"
(Xilinx Answer 12808) - "Should equivalency checking replace simulation?"
(Xilinx Answer 12809) - "When should I use equivalency checking?"
(Xilinx Answer 12810) - "How will I benefit from using equivalency checking?"
(Xilinx Answer 12811) - "Can I use equivalency checking to re-target an FPGA to an ASIC? If so, how?"
(Xilinx Answer 12812) - "Which equivalency-checking tool vendors does Xilinx support?"
(Xilinx Answer 12813) - "What platforms does Xilinx support?"
(Xilinx Answer 12814) - "I am a current Formality/Conformal customer. Who should I contact for support-related issues?"
(Xilinx Answer 12815) - "Are application notes regarding verification flow available?"
(Xilinx Answer 12816) - "What are the limitations of the verification flows?"
(Xilinx Answer 12817) - "Does the verification flow work with the Synopsys FCII, Synplicity Synplify, and Mentor LeonardoSpectrum synthesis tools?"
(Xilinx Answer 12818) - "Does the verification flow work with all languages?"
(Xilinx Answer 12820) - "Who supplies libraries?"
(Xilinx Answer 12821) - "What libraries does Xilinx provide?"
(Xilinx Answer 12822) - "How do I install the libraries that are referenced by Xilinx Application Note 411?"
(Xilinx Answer 12823) - "What Xilinx product families are supported?"
AR# 12806
Date 06/23/2004
Status Archive
Type General Article