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AR# 12938

7.1i XST, Virtex-E - "ERROR:DesignRules:450 (451) - Blockcheck: Illegal LVDS configuration..."

Description

Keywords: pair

Urgency: Standard

General Description:
When I implement LVDS by the usual means described in (Xilinx Answer 8187) in XST for either Verilog or VHDL, the following errors occur:

"ERROR:DesignRules:450 - Blockcheck: Illegal LVDS configuration. The slave Comp dout_n and the master Comp dout_p are not programmed correctly. Both comps must be programmed the same except that the slave OMUX programming must be inverted with respect to the master OMUX programming."

"ERROR:DesignRules:451 - Blockcheck: Illegal LVDS configuration. The slave Comp dout_n and the master Comp dout_p have different signals on Pin 0."

"ERROR:DesignRules:451 - Blockcheck: Illegal LVDS configuration. The slave Comp dout_n and the master Comp dout_p have different signals on Pin 5."

Solution

1

To avoid these errors, set the IOB attribute to "No" for XST:

ISE
1. Highlight the top-level file.
2. Right-click the "Synthesize" process.
3. Select "Properties."
4. Select "Xilinx Specific Options."
5. Change "Pack I/O Registers into IOBs" from "Auto" to "No."

XST Command Line
Use "-iob false"

HDL
To pass constraints through HDL, please refer to the XST User Guide at:
http://support.xilinx.com/support/software_manuals.htm

2

For LVPECL, the XST synthesis option "Equivalent Register Removal" can also cause this error. This option is turned on by default in ISE. Turning it off might help you avoid the errors above.

3

This problem can occur if the input is registered in bidirectional LVDS IOBs. Consequently, MAP must also have input IOB register-packing disabled.
AR# 12938
Date Created 08/29/2007
Last Updated 10/23/2008
Status Archive
Type General Article