We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 13304

4.1i ISE - When I convert to version 4.1i software, Project Navigator ABEL-XST projects from version 3.3i are not converted to ABEL-XST-VHDL


Keywords: ABEL, XST, Project Navigator, ProjNav, VHDL, EDIF, convert, not supported

Urgency: Standard

General Description:
When I convert an ABEL-XST project from version 3.3i of the software to version 4.1i, Project Navigator reports the following message:

"This project was last saved by ABEL XST, which is not supported by this version.
Project will be open with the default design flow."

The flow is then reset to EDIF and shows the .abl source files as user documents. The project converter should change the ABEL-XST flow to ABEL-XST-VHDL.


You must change the "Design Flow" setting under "Project Properties" to either "ABEL-XST-Verilog" or "ABEL-XST-VHDL".

This problem is fixed in the latest 4.1i Service Pack, available at:
The first service pack containing the fix is 4.1i Service Pack 3.
AR# 13304
Date Created 12/03/2001
Last Updated 08/11/2003
Status Archive
Type General Article