The Data Sheet for the DCM of Virtex-II, Virtex-II Pro, or Virtex-4 does not specify the cycle-to-cycle output jitter. (Previous Virtex/-E data books included this specification for the DLL.)
What is the cycle-to-cycle output jitter for DCM?
Part of the cycle-to-cycle jitter comes from DCM_TAP_MAX. This can be found in the Switching Characteristics section of the Data Sheet for each device:
However, other factors such as input jitter, internal DCM delay, and routing also contribute to the resulting cycle-to-cycle jitter.
For timing budgeting, use the period jitter. See (Xilinx Answer 13645) for more information.
For a description of cycle-to-cycle jitter, see (Xilinx Answer 12010).