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AR# 14004

4.1 NGD2VER - When using the "-ul" switch, an empty `uselib should be added to the end of the file

Description

Keywords: NGD2VER, -ul, `uselib, Cadence

Urgency: Standard

General Description:
Cadence users can use the "-ul" switch to include a `uselib in the Verilog file. The `uselib points to the Verilog SimPrim library. At the end of the Verilog file, an empty `uselib should be included to release the restriction on the search path. If this is not done, other files may not load properly.

In 4.1i Service Pack 3, an empty `uselib was not included at the end of the Verilog file, so users were forced to add it manually.

Solution

This problem is fixed in the latest 4.2i Service Pack, available at:
http://support.xilinx.com/support/techsup/sw_updates
The first service pack containing the fix is 4.2i Service Pack 1.
AR# 14004
Date Created 08/29/2007
Last Updated 08/15/2003
Status Archive
Type ??????