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AR# 14111

4.1i XST - A complemented equation yields incorrect results in XST


Keywords: Boolean, VHDL, equation, result, wrong, incorrect, bad, logic

Urgency: Standard

General Description:
A complemented equation may produce incorrect results in XST.

For example:

singal in_a, in_b : std_logic_vector (1 downto 0);
in_a <= "11";
in_b <= "11";
out_put <= not ( in_a - in_b );

This will generate a "00" for out_put instead of an "11".


This problem is fixed in the latest 4.2i Service Pack, available at:
The first service pack containing the fix is 4.2i Service Pack 1.
AR# 14111
Date Created 03/07/2002
Last Updated 08/06/2003
Status Archive
Type General Article