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AR# 14128

Virtex-II/-II Pro/-4, DCI/XCITE - Not all DCI inputs or outputs require reference resistors on VRN and VRP. Can I use VRN/VRP as regular I/O when DCI is not used?

Description

Keywords: digital, control, impedance, series, termination, SSTL, HSTL, driver, bank, Virtex-II Pro, Virtex-4

The following DCI outputs do not require reference resistors on VRN and VRP:

HSTL_I_DCI
HSTL_III_DCI
HSTL_I_DCI_18
HSTL_III_DCI_18
SSTL3_I_DCI
SSTL2_I_DCI

NOTE: There is no standard available for LVDS DCI output I/O. See Note 1 in the resolution section for more information.

The following inputs do not require reference resistors on VRP and VRN:

LVDCI_15
LVDCI_18
LVDCI_25
LVDCI_33
LVDCI_DV2_15
LVDCI_DV2_18
LVDCI_DV2_25
LVDCI_DV2_33

There is no termination on these inputs. LVDCI_25 input = LVCMOS25 input.

Does this mean that VRN and VRP can be used as general I/O in a bank that contains these outputs?

Solution

Yes. For the inputs and outputs listed above, DCI termination is not used. Consequently, you can use the VRN/VRP as regular I/O. These input and output buffers are available as naming conventions only to match them with their respective outputs and inputs.

If you choose to use VRN and VRP as general I/O, make sure that the DCI I/O standards listed above are the only DCI standards (input or output) in the appropriate bank.

NOTES:
1. For LVDS DCI (input termination), software (currently NetGEN and BitGen) errors out if LVDS_25_DCI is attached on an output buffer to reflect that there is no DCI termination at the output.

2. More information is available in the family User Guides (see links below).

Select the FPGA Device Family you are using and then the User Guide.
http://www.xilinx.com/support/documentation/index.htm

For details on the termination requirements for the various I/O standards, see "Design Considerations" -> "Using Single-Ended SelectIO Resources."

3. The 25-ohm resistor in series with the SSTL3_I_DCI and SSTL2_I_DCI outputs is not DCI-controlled.

4. You should always perform IBIS simulation to verify the signal integrity on any PCB trace. You can download Xilinx IBIS models at:
http://www.xilinx.com/support/download/index.htm

AR# 14128
Date Created 08/29/2007
Last Updated 10/14/2008
Status Active
Type General Article