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AR# 14181

SmartModel - What are the SWIFT Interface, SmartModel, VMC, and VhMC? What does Xilinx deliver?


Keywords: Smart, Model

What is the SWIFT Interface? What is a SmartModel? How is it created? What is VMC and VhMC? What does Xilinx deliver?


Term Definitions

SWIFT Interface: SmartModels connect to hardware simulators through the SWIFT interface, which is integrated with over 30 commercial simulators, including Synopsys VCS, Cadence NCSIM, and Model Technology ModelSim SE/PE.

SmartModel: SmartModels represent integrated circuits and system buses as black boxes that accept input stimulus and respond with appropriate output behavior. Such behavioral models are well-suited for distribution in object code form because they provide improved performance over gate-level models, while at the same time protecting the proprietary designs created by semiconductor vendors.

VMC: The Verilog Model Compiler (VMC) compiles Verilog code into SmartModel object code.

VhMC: The VHDL Model Compiler (VhMC) compiles VHDL code into SmartModel object code.

Xilinx delivers SmartModels for the PowerPC and RocketIO components.

Please see (Xilinx Answer 14019) for more information.
AR# 14181
Date Created 08/29/2007
Last Updated 11/17/2008
Status Archive
Type General Article