Description

Keywords: trce, MAP

Urgency: Standard

For more information on Stepping Levels and setting the CONFIG STEPPING constraint for all devices, see (Xilinx Answer 20947).

For Virtex-II devices, the constraint is available for accessing enhanced multiplier speed. When the CONFIG STEPPING constraint is specified for an enhanced multiplier, Timing Analyzer and Trace perform timing analysis based on the enhanced multiplier performance.

The valid values for this constraint are described in the following table:

CONFIG STEPPING Values
* The "N/A" marking indicates that stepping level "0" or "ES" is not applicable for these devices. The stepping value for these devices must always be set to "1" to reflect the correct multiplier timing number.
** For 2v40, "0" and "1" values are available starting with 4.2i SP3 (not available in 4.2i SP2.) Starting with 5.1i, the default stepping level value for 2v40 is "1"; it was set to "ES" in the previous software version.

If an incorrect value is specified, MAP automatically sets STEPPING to the default value for the device and reports the following warning:

"WARNING:Ncd:545 - The stepping value does not match a supported stepping for this device."

The constraint format is described in the "Solution" sections below.

NOTES:
- The following devices support the enhanced multiplier:
* XC2V80, XC2V250, XC2V500, XC2V1500, XC2V2000, and XC2V8000 ES or C devices.
* XC2V40, XC2V3000 all C devices.
* XC3000ES devices that are specifically identified by a three-letter "AMT" code.
* XC2V1000, XC2V4000, and XC2V6000 C devices that are specifically identified by a three-letter "AMT", "AGT" or "BGT" code, which is located on the second line of the package marking. (Not all C devices support the enhanced multiplier).

The following table summarizes device support and markings:

Device Support and Special Markings

- To obtain enhanced multiplier performance in an FPGA, you must download your design to the FPGA with the enhanced multiplier marking.
- You must use a specific ordering code to order devices with enhanced multiplier performance. For device availability and ordering information, contact your FAE or Xilinx sales office.
- Devices containing enhanced multiplier also support Triple DES as specified in the Virtex-II Platform FPGA User Guide: "Design Considerations" -> "Using Bitstream Encryption":
http://www.xilinx.com/xlnx/xweb/xil_publications_display.jsp?category=/User+Guides/FPGA+Device+Families/Virtex-II/&iLanguageID=1

For XC2V1000 and larger devices, you might need a specific ordering code for Triple DES support. Please remember when ordering the device to inform your FAE or sales office if you are planning on using the Triple DES feature.