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AR# 1459

How to get the pin order of a XSI Library Cell in Synopsys or How to get the pins names for a XSI library cell

Description

In VHDL and Verilog, when a user instantiates a
component/module, some user use the style known as
positional notation. Positional notation lets a
user 'instantiate' a component/module without
explicitly specifying the ports/pins of that
component/module.

To use the positional notation coding style, the user must
know the order of the pins of the component/module.

Solution

1

In the Synopsys(XSI) for FPGA Interface/Tutorial Guide,
appendix's A and B list the order of the pins of
instantiable compoents from left to right.

The components/modules listed in appendix's A and B
are for the XC3000/A and XC4000/A/H families.




For components/modules specific to the XC5200 and XC4000E,
see the latest copy of the XSI 5.2.1 Release Notes.

For the XC7300, Appendix B of the
Synopsys(XSI) for EPLDs Interface/Tutorial Guide list
all the components instantiable by users. Appendix
B gives an example port mapping for each component.
The pin order in the example port mapping is the
pin order that can be used for positional notation.


For the XC9500, Appendix A of the
CPLD XSI Design Guide(which is an on-line doc)
Appendix A gives an example port mapping for each component.
The pin order in the example port mapping is the
pin order that can be used for positional notation.

2

If you don't have a copy of the
Synopsys(XSI) for FPGAs Interface/Tutorial Guide,
Synopsys(XSI) for EPLDs Interface/Tutorial Guide, the
latest release notes, or the online document

then follow this procedure:


(1)
Invoke the design_analyzer or dc_shell in a directory
which contains the .synopsys_dc.setup file you want to
use for synthesis.

(2)
In the command window of the design_analyzer, or in dc_shell,
run the following command:


read -f db link_library

(3)
In the command window of the design_analyzer, or in dc_shell,
run the following command:

list -files


This command will list all the library .db files loaded into
your design. At this point you must know which of the .db
files contains the library cell you are interested in.
See solution 1458

(4)
In the command window of the design_analyzer, or in dc_shell,
run the following command


find(pin, "dbfilename/cellname/*")


where 'dbfilename' is the name of the .db file loaded
into memory(see the results of list -files for
the .db files loaded into memory), and cellname is the
name of the library cell of interest.


For example, lets say that you need the pin order of the
OR2 cell in the XC7000 library. The OR2 is in the xc7000.db
file. So, you run:

read -f db link_library
list -files

and then you run

find(pin,"xc7000/OR2/*")

which gives
{"O" "I1" "I0"}

which is the order of the pins that can be used for
positional notation.
AR# 1459
Date Created 10/31/1996
Last Updated 03/19/2000
Status Archive
Type General Article