We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 14670

MicroBlaze, OPB Peripherals - Improving decode time by increasing address spacing for OPB Peripherals


General Description:  

MicroBlaze documentation for certain peripherals states that if a larger portion of the address space is allocated to a certain peripheral, the decoding logic is simplified. Is this applicable to all OPB peripherals?


Yes, this applies to all OPB peripherals. As the address space allocated to any OPB peripheral is increased, the number of address bits required for address decode is decreased. For example, decoding down to a peripheral address space of 256 bytes requires the decoder to look at 24 address lines (32 - log2(256)).  


However, if your memory map is sparse and can allocate 1 MB to the interrupt controller, only 12 address lines are required (32 - log2(1 M)). This both simplifies and speeds up the decode logic.

AR# 14670
Date 05/14/2014
Status Archive
Type General Article
Page Bookmarked