UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 14770

3.7 FPGA Express - Using the stand-alone version causes a error, but the source passed in another version or the ISE GUI

Description

Keywords: FPGA, Express, stand, alone, error, Verilog

Urgency: Standard

General Description:
When I attempt to compile a Verilog source with the stand-alone version of FPGA Express, it fails, even though the source was compiled from the ISE GUI or older version of FPGA Express.

Solution

This problem occurs because a default option differs between versions 3.6 and 3.7, or the ISE GUI and the stand-alone version of FPGA Express. The default synthesis engine for FPGA Express 3.7 is the Presto Compiler; the default synthesis engine for FPGA Express versions 3.5 and 3.6 is HDLC. Likewise, in ISE the default setting for the synthesis engine is HDLC (for versions 3.5, 3.6 and 3.7).

To set the synthesis engine in the stand-alone version of FPGA Express, follow these steps:

1. Go to the Synthesis pull-down menu and select "Options".
2. Select the "Project" tab.
3. Select Compatible HDL Compiler - HDLC.
4. Be sure to select "Force Update" before you synthesize.
AR# 14770
Date Created 05/28/2002
Last Updated 08/11/2003
Status Archive
Type General Article