Is it possible for channel bonding to be performed across multiple Virtex-II Pro chips?
This has not been tested by Xilinx, so the process is not supported at this time.
To channel bond across chips, the path from CHBONDO to CHBONDI must be less than [RXUSRCLK period - (CHBONDO CLK-to-OUT + IOB output delay + trace delay + IOB input delay + CHBONDI setup + RXUSRCLK skew)].
If this requirement is met, channel bonding will function correctly across multiple chips.
You can also register the CHBONDO output of the master at an IOB and send it to the other chip. The transceiver that receives this signal on it CHBONDI port could then be a slave_2_hop. This will break up the path described above and leave more slack in the timing constraints.