The following warning message occurs:
"WARNING:Xst:1306 - Output <pin-name> is never assigned."
This warning is reported when ports are declared in the entity of your top-level VHDL design, but are not driven by any signals in your design. This can happen in the early stages of the design cycle if you have not yet assigned all outputs.
Make sure that the signals mentioned in the warning message are the signals that you are not driving intentionally. Also, ensure that all necessary internal signals are connected to the appropriate outputs.