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AR# 15199

Virtex-II Pro-X RocketIO - Why does PMARXLOCK not assert in simulation?

Description

General Description: 

PMARXLOCK does not assert.

Solution

This issue might be caused by the following: 

 

REFCLK not toggling at simulation startup 

Make sure REFCLK is toggling in the simulation. This is important to check because initially RX PLL locks to REFCLK for nominal frequency lock and then locks to data to recover the clock frequency and phase from the data.  

 

A runt pulse or no transitions 

When looking for lock, the model uses the smallest bit received to calculate the mathematical lock. Consequently, if the incoming data stream contains a runt pulse or never has a single bit transition it will never lock.

AR# 15199
Date Created 09/03/2007
Last Updated 05/14/2014
Status Archive
Type General Article