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AR# 15218

4.2i Speed Files - New speed files for Virtex-II have been released (July 18, 2002)


Keywords: speed, files, Virtex-II, V-II, latest, version, 1.111

Urgency: Standard

General Description:
Version 1.111 of the Virtex-II Speed Files became available on July 18, 2002, after the release of 4.2i Service Pack 3 (which contained version 1.105). All users should download and install the new version.

Note that 4.2i Service Pack 2 was released with speed file version 1.100. (Please see (Xilinx Answer 12201) for more information.) Therefore, when you upgrade from speed file 1.100 to 1.111, the Virtex-II speed files are affected by two upgrades:

1. The changes from 1.100 to 1.105
2. The changes from 1.105 to 1.111

(NOTE: All adjustments are included in the latest speed file version, so you may install version 1.111 on top of 1.100 without installing version 1.105 in between.)



The highlighted changes in Virtex-II Speed Files Version 1.111 are:

1. TPHFD for XC2V2000, XC2V3000, and XC2V4000 devices is changed to 0 from a positive value for the -4 speed grade.
2. Horizontal and Vertical Long Line delays are adjusted for the -6 speed grade.
3. The multiplier parameter for STEP0 for the -6 speed grade is made equal to STEP1 -6.
4. Support for MINs (-0 speed grade) is added.

You may download the new speed files at:

To install the new speed files, unzip the downloaded file into your <$xilinx>\virtex2\data directory.


The highlighted changes in Virtex-II Speed File Version 1.105 are:

1. The XC2V80, XC2V250, XC2V500, XC2V2000, XC2V3000, and XC2V4000 are designated production devices for -4 and -5 speed grades.

2. Multiplier performance is greatly improved for the stepping one-multiplier design. These numbers are reflected in the "Enhanced Multiplier" section of the data sheet (page 22-23):

3. BRAM dedicated address routing delay is increased. The affected routing is highlighted by the arrows in the following figure:
Dedicated BRAM address routing going from BRAM to BRAM
Dedicated BRAM address routing going from BRAM to BRAM

4. The "HEX/LongLine" routing delay was adjusted on the XC2V80, XC2V250, and XC2V500 devices.

5. Pin-to-pin parameter with delay (Tpsfd/Tphfd) changes are made, as reflected in the data sheet linked above.

6. Changes in the adjustment factors for I/O standards other than LVTTL are made, as reflected in the data sheet linked above.
AR# 15218
Date Created 07/18/2002
Last Updated 08/12/2003
Status Archive
Type General Article