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AR# 15439

5.1i XST - "FATAL_ERROR:HDLParsers:vhpnames.c:622:$Id: vhpnames.c,v 1.27 2002/04/04 18:27:59 weilin Exp $:200..."

Description

Keywords: FATAL, ERROR, HDLParsers, VHDL, vhpnames, 610

When I synthesize with XST, the following error occurs:

"FATAL_ERROR:HDLParsers:vhpnames.c:622:$Id: vhpnames.c,v 1.27 2002/04/04 18:27:59 weilin Exp $:200 - INTERNAL ERROR... while parsing C:/top.vhd line ##. Contact your hot line. Process will terminate. To resolve this error, please consult the Answers Database and other online resources at http://support.xilinx.com."

The problem occurs when an alias construct is used to make an array of a slice of a declared signal via generics.

Example

signal temp_reg : bit_vector(size downto 0);
alias temp_inarray : bit_vector(size-1 downto 0) is temp_reg(size-5 downto 0);

Solution

To work around this issue, replace the generic "size" with an actual number as shown in the following example:

signal temp_reg : bit_vector(size downto 0);
-- alias temp_inarray : bit_vector(size-1 downto 0) is temp_reg(size-5 downto 0);
alias temp_inarray : bit_vector(size-1 downto 0) is temp_reg(11 downto 0);
AR# 15439
Date Created 09/03/2007
Last Updated 12/16/2008
Status Archive
Type General Article