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AR# 15594

5.1i Simulation, UniSim/SimPrim, DCM - The Status 2 output of the DCM is not functioning properly


Keywords: simulation, UniSim, SimPrim, DCM, Status, 2, RST

Urgency: Standard

General Description:
The Status 2 output of the DCM indicates when CLKFX has stopped. Once this is asserted, it should not de-assert until the DCM is reset. However, this is not the case in my behavioral or timing simulation; the Status 2 pin will assert when CLKFX is stopped, but will de-assert when CLKFX resumes.

(Please see (Xilinx Answer 10972) for a more detailed description of the status pins on the DCM.)



The simulation does not indicate a problem in the hardware; in the hardware, the Status 2 output will not de-assert until the DCM is reset.

This is scheduled to be fixed in the 5.2i software, which will be available in late February, 2003.


Until the software fix is available, one possible way to work around this problem is to add logic in the testbench that monitors Status bit 2. If Status bit 2 goes High after the lock goes High, the testbench can set a flag that does not de-assert until the DCM is reset.
AR# 15594
Date Created 09/03/2007
Last Updated 11/18/2008
Status Archive
Type General Article