This problem has been confirmed on a Virtex-II FF1152 AFX board, revision D, with a flip-lid socket. Symptoms differ depending on the cable used on the board.
Parallel Cable-III Symptoms:
Cannot detect the user FPGA JTAG chain when the JTAG Control switch is set to 0, 1, or 2 and the Config Mode switch is set to 5 (JTAG).
Parallel Cable-IV Symptoms:
The User FPGA JTAG chain is detected when the JTAG Control switch is set to 0, 1, or 2 and the Config Mode switch is set to 5 (JTAG). However, IDCODE looping fails. Programming fails sometimes and works at other times.
Other items of note that occur with either the Parallel Cable-III or Parallel Cable-IV
1. There do not appear to be any issues in Slave-serial mode.
2. Bypassing the service FPGA allows the detection of the JTAG chain. You can bypass the service FPGA by connecting directly to the breakout area around the User FPGA (the locations are printed on the board) and either erasing the service PROM or setting the JTAG Control switch to 4 and the Config Mode switch to 7.
3. Connecting to the service JTAG chain is not a problem.
A new service PROM MCS file was created to address this issue. The MCS file differs from the one included on the CD that comes with the board.
The MCS file is available at:
The MCS file needs to be programmed into the Service PROM. To do so, connect to the header labelled "JTAG interface service PROM and FPGA." Then erase the service PROM and re-program it with the new MCS file.