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AR# 15731

7.1i XST - XST appears to run in an infinite loop and takes a long time to synthesize code


Keywords: forever, hangs, slow, synthesis

Urgency: Standard

General Description:
In 6.1i and 5.1i with Service Pack 1, XST appears to run in an infinite loop and takes an extremely long time to synthesize code on a certain set of files.

Why does this occur?



A common cause of this problem is in the generation and creation of the RTL Viewer netlist (.ngr file). To speed up the synthesis process, turn off the RTL netlist generation as follows:
1. Right-click the "Synthesize" process.
2. Select "Properties... "
3. Under the Synthesis Options tab, change the Generate RTL Schematic from "Yes" to "No."


Another cause of this problem is shown in the code below (making the comparison in integer form is not successful):

irq5_w <= '1' WHEN
((to_int(addrl) = irq5_addr1) AND
write_reg_sig = '1')
ELSE '0';

Comparison at the std_logic level does work, as in the following code:

irq5_w <= '1' WHEN
(addrl = to_std_vec(irq5_addr,15,0) AND
write_reg_sig = '1')
ELSE '0';

This specific problem has been fixed in version 7.1i.
AR# 15731
Date Created 09/03/2007
Last Updated 01/06/2009
Status Archive
Type General Article