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AR# 16028

11.1 XST - "ERROR:HDLCompilers:26 - design_name.prj line xx expecting 'endmodule', found 'EOF'"


Keywords: XST, HDLCompilers:26, synthesis, endmodule, EOF, Verilog, Unicode, Asian, Japanese, Koeran, Chinese

Urgency: Standard

General Description:
When I run a design in XST, the following error is reported:

"HDLCompilers:26- design_name.prj line xx is expecting 'endmodule', found 'EOF'."


This problem occurs if a synthesis/compiler directive in one of your Verilog modules has not been closed.

For example, a //synthesis translate_off directive without the corresponding translate_on will trigger this error. An `ifdef that is used without a `endif will also cause the error.

When using a computer system with an Asian character set this erro may occur due to a "space" character which uses two bytes.
AR# 16028
Date Created 09/03/2007
Last Updated 09/14/2009
Status Archive
Type General Article