LogiCORE MAC FIR v5.0 - Why do I get memory collision errors when doing a back-annotated Verilog simulation of the MAC FIR?

AR#	16106	Search For Another Answer
Topic	IP-DSP Horizontal
Last Updated	04/01/2009
Status	Archive

Description

Keywords: MAC FIR, back annotated, simulation, collisions, memory, 3.0, 5.0, 5.1

Why do I get memory collision errors when doing a back-annotated Verilog simulation of the MAC FIR?

Solution

This is a known problem.

Currently some simulators, such as NCSIM error out and will stop simulating. Other simulators will finish simulation, such as MTI's ModelSim, and the results will be correct.