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AR# 16120

LogiCORE MAC FIR v2.0 - Output is invalid until contents of the data memory buffer are filled with data


Keywords: Core, CORE Generator, COREGen, MAC FIR, invalid, output, incorrect, X, 0

On certain simulators such as NCSIM and ActiveHDL, the output of the MAC FIR is always "x" (invalid) for the first N (number of coefficients) cycles of the filter. Why is this?


This problem occurs because of the way each individual HDL simulator handles the initialization of Distributed RAM in a simulation. In some simulators, if the MAC FIR data buffer's distributed memory (block memory does not have this problem) is not initialized specifically to zero, it powers up with "x"s in the memory; these propagate through to the DOUT port of the MAC FIR until enough samples have been received to fill the buffer with data.

For example:

For an N-tap filter, the first N outputs are "x" (which can cause a simulation to fail completely if the filter is in a feedback loop); subsequently, the DOUT port has the correct data because the "x"s have been flushed out of the data buffer.

This problem will be fixed in 5.1i IP Update #2.
AR# 16120
Date Created 09/03/2007
Last Updated 04/01/2009
Status Archive
Type General Article