We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 16157

5.1i XST - "FATAL_ERROR: Xst:fctutil.c: 997:1.25 - Current result may be incorrect..."


Keywords: 5.1i, VHDL, Verilog, multiple, driver, RTL, view, fatal, error, XST

Urgency: Standard

General Description:
When I synthesize a design through XST, the following error message occurs:

"FATAL_ERROR:Xst:fctutil.c:997:1.25 - Current result may be incorrect, in FctTreeToLPTerm (remove complex constant from specification) Process will terminate. To resolve this error, please consult the Answers Database and other online resources at http://support.xilinx.com. If you need further assistance, please open a WebCase by clicking on the 'WebCase' link at http://support.xilinx.com"


This error occurs when the "Generate RTL Schematic" switch is on and multiple driver errors occur in the design. To determine the source of the multiple driver error problem, turn off "Generate RTL Schematic" as follows:

1. Right-click the "Synthesize" process.
2. Select "Properties".
3. Under the "Synthesis Properties" tab, change "Generate RTL Schematic" from "Yes" to "No".
AR# 16157
Date Created 11/15/2002
Last Updated 10/20/2005
Status Archive
Type General Article