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AR# 16577

6.3 EDK - "ERROR: Data2BRAM:4 - Matching ADDRESS_BLOCK for code segment #0"

Description

General Description: 

When I update the bitstream, the following error occurs: 

 

"Initializing BRAM contents of the bitstream 

./bram_init.sh 

Initializing BRAMs with program information ... 

 

ERROR:Data2BRAM:4 - Matching ADDRESS_BLOCK for code segment #0 not found in 'implementation/system_bd.bmm'. Code segment #0 occupies [0x00000000:0x000015FB] 

make: *** [implementation/download.bit] Error 4"

Solution

Platform Generator is incorrectly creating the BMM file when the design contains external memory controllers. The BMM file has no reference to the external memory; rather, it only references the internal BRAM. This error is caused because the linker script places part of the code in BRAM and part in DDR.  

 

To avoid this problem, you must manually add the information for the external memory to the BMM file.  

 

The following example illustrates 128MB of DDR memory on the ML300 Demonstration Board: 

 

ADDRESS_BLOCK DDR_memory MEMORY [0x00000000:0x07FFFFFF] 

 

BUS_BLOCK 

testbench/ddr3/Bank0 [31:24] OUTPUT = ddr3_bank0.mem; 

testbench/ddr2/Bank0 [23:16] OUTPUT = ddr2_bank0.mem; 

testbench/ddr1/Bank0 [15:8] OUTPUT = ddr1_bank0.mem; 

testbench/ddr0/Bank0 [7:0] OUTPUT = ddr0_bank0.mem; 

END_BUS_BLOCK; 

 

BUS_BLOCK 

testbench/ddr3/Bank1 [31:24] OUTPUT = ddr3_bank1.mem; 

testbench/ddr2/Bank1 [23:16] OUTPUT = ddr2_bank1.mem; 

testbench/ddr1/Bank1 [15:8] OUTPUT = ddr1_bank1.mem; 

testbench/ddr0/Bank1 [7:0] OUTPUT = ddr0_bank1.mem; 

END_BUS_BLOCK; 

 

BUS_BLOCK 

testbench/ddr3/Bank2 [31:24] OUTPUT = ddr3_bank2.mem; 

testbench/ddr2/Bank2 [23:16] OUTPUT = ddr2_bank2.mem; 

testbench/ddr1/Bank2 [15:8] OUTPUT = ddr1_bank2.mem; 

testbench/ddr0/Bank2 [7:0] OUTPUT = ddr0_bank2.mem; 

END_BUS_BLOCK; 

 

BUS_BLOCK 

testbench/ddr3/Bank3 [31:24] OUTPUT = ddr3_bank3.mem; 

testbench/ddr2/Bank3 [23:16] OUTPUT = ddr2_bank3.mem; 

testbench/ddr1/Bank3 [15:8] OUTPUT = ddr1_bank3.mem; 

testbench/ddr0/Bank3 [7:0] OUTPUT = ddr0_bank3.mem; 

END_BUS_BLOCK; 

 

END_ADDRESS_BLOCK;

AR# 16577
Date Created 09/03/2007
Last Updated 05/15/2014
Status Archive
Type General Article