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AR# 16978

6.1i PAR - "WARNING:Timing:2721 - The clock <> is the input to DCM <> ... This violates the pulse width of <> which has a minimum low pulse..."

Description

Keywords: PAR, warning, dcm, dll, pulse width, high, low, frequency, range, invalid

Urgency: Standard

General Description:
The following warning is given by PAR; however, the input clock seems to be following the data sheet specs:

"WARNING:Timing:2721 - The clock s_clk_ctm is the input to DCM dll_ctm.
s_clk_ctm has a low pulse width of 1875 ps and a high pulse width of 1875 ps.
This violates the pulse width of dll_ctm which has a minimum low pulse width
of 2082 ps and a minimum high pulse width of 2082 ps."

"WARNING:Timing:2721 - The clock s_clk_ctm is the input to DCM dll_ctm.
s_clk_ctm has a low pulse width of 1875 ps and a high pulse width of 1875 ps.
This violates the pulse width of dll_ctm which has a minimum low pulse width
of 2082 ps and a minimum high pulse width of 2082 ps."

The source clock is 266 MHz, and the limit on a -5 DCM in HIGH frequency mode is 420 MHz, so it shouldn't complain!

Solution

1

The warning can be ignored, if you have checked the data sheet and your input frequency does meet the specification for the mode you are using.

The problem stems from the fact that the DCM has 2 separate frequency mode attributes. One is DLL_FREQUENCY_MODE, and the other is DFS_FREQUENCY_MODE.

In the sample design, DLL_FREQUENCY_MODE is set to "high", which should allow for the limit for DLL mode outputs in the data sheet for HIGH mode.

It appears the tools are also looking at the DFS_FREQUENCY_MODE, which is apparently, by default, set to LOW. This makes the tool think that the highest frequency is limited by the CLKFX limit in the data sheet for LOW mode.

This is not correct, if you are not using the DFS/CLKFX outputs.

There is a simple work-around to get a larger range, without the warning.

Adding the following ucf constraint to the dcm in question:

INST my_dcm DFS_FREQUENCY_MODE = HIGH;

This will work if your input frequency is below the HIGH mode DFS/CLKFX limit. However, if you use an even faster clock, it will again issue a warning. Though the frequency meets the restrictions for DLL outputs, the tools are again looking at the more restrictive CLKFX limit, even though that limit doesn't apply (if you still aren't using CLKFX).

2

This warning has also been caused by using the simplier method of creating a PERIOD constraint on the input clock to the DCM. For example, the following PERIOD constraint can cause this warning to appear in PAR:

NET "clkin" PERIOD = 2.778 ns;

This is the syntax that Synplicity uses to create PERIOD constraints in the ".ncf" and is commonly the source of the problem. To avoid these warnings, use the following method when creating PERIOD constraints on the input clock of the DCM:

NET "clkin" TNM_NET = "clkin";
TIMESPEC "TS_clkin" = PERIOD "clkin" 2.778 ns HIGH 50 %;
AR# 16978
Date Created 09/03/2007
Last Updated 10/20/2008
Status Archive
Type General Article