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AR# 17274

6.3i/6.2i/6.1i XST - When the insert I/O buffer switch is deselected, XST adds BUF primitives to my clock network

Description

Keywords: clock, BUF, insert, IOBUF, IBUF, max, fanout

What can I do to prevent XST from inserting the BUF primitive on my clock network when the I/O buffer switch is deselected?

Solution

You can add a "maxfanout" attribute on the clock signal so that XST does not put BUFs on the clock network:

VHDL
attribute max_fanout : string;
attribute max_fanout of clk : signal is "10000";

Verilog
//synthesis attribute max_fanout of clk is "10000"

This issue is fixed in ISE 7.1i
AR# 17274
Date Created 09/03/2007
Last Updated 01/06/2009
Status Archive
Type General Article