Currently, the Architecture Wizard displays an option to choose low jitter dedicated differential clock pads as shown in Figure 1 below. This instantiates the GT11CLK module within the wrapper generated by the Architecture Wizard.

Uncheck this option. To keep the clocking architecture flexible, instantiate the GT11CLK module at the top level and connect them as described in the Virtex-4 RocketIO Multi-Gigabit Transceiver User Guide. To access this manual, go to the following Web page and select Doc Type, User Guides, and Virtex-4 from the list:
http://www.xilinx.com/xlnx/xweb/xil_publications_index.jsp?category=User+Guides
This option will be removed in the next development tool release.