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AR# 17433

3.2 EDK OPB HDLC - "ERROR: IO error when creating files for XST synthesis!"

Description

Keywords: EDK, OPB, HDLC, IO, XST, synthesis, PlatGen, internal, error

Urgency: Standard

General Description:
When simulating the opb_pci module from the EDK, the following error is reported:
"# ** Fatal: (vsim-3420) Array lengths do not match. Left is (223 downto
216). Right is (0 to 31)."

Solution

This problem is fixed in the latest 3.2 EDK Service Pack, available at:
http://support.xilinx.com/ise/embedded/edk.htm
The first service pack containing the fix is 3.2 EDK Service Pack 2.
AR# 17433
Date Created 06/12/2003
Last Updated 04/06/2007
Status Archive
Type General Article