AR #17501 - 11.1 Timing Analyzer - Cross-probing does not work consistently with FPGA Editor
11.1 Timing Analyzer - Cross-probing does not work consistently with FPGA Editor
| AR# | 17501 |
| Topic | SW-Timing Analyzer/TRCE |
| Last Modified | 2009-07-08 00:00:00.0 |
| Status | Active |
Description
Keywords: cross, probing, FPGA Editor, timing, analyzer
Cross-probing does not work consistently on my computer while using ISE. How can I make cross-probing work?
Solution
When a logical resource is selected in Timing Analyzer, FPGA Editor occasionally generates the following warning:"Unable to select sym LVDS_DATA/SERDES_TX/tx3/ddr_reg3/FF1."
This is a known problem in correlating logical and physical elements.