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AR# 17606

PROMGen - Support for Platform Flash PROM Design Revisioning (CFI file format)

Description

Keywords: XCFxxP, XCF08P, XCF16P, XCF32P, version, MCS, bank, option, -ver, -i, -z, impact

The design revisioning capabilities of the Platform Flash XCF08P, XCF16P, or XCF32P PROM are based on partitioning the internal memory into 8 MB physical blocks. Each block can be addressed independently or can be chained to create a contiguous memory space addressed by the revision selection. Design revision selection logic is sourced by either internal registers or external pins. The design revision selection can be changed to load the connected target FPGA(s) with the data stored in a particular block or groups of blocks. Up to four unique design revisions can be stored on a single PROM or on a cascaded PROM chain.

PROM file generation with design revisioning support for the Platform Flash PROM was first introduced in iMPACT 6.1i Service Pack 1. For more information, see:
http://www.xilinx.com/xlnx/xil_sw_updates_home.jsp

Solution

1

PROM File Generation:
The iMPACT GUI provides a PROM file generation wizard which simplifies the PROM file creation process. Optionally, iMPACT can be used in batch mode to generate the PROM files. Detailed information on iMPACT batch mode options can be found in the iMPACT software help menus.

Another option is to use the PROMGen command directly. PROMGen creates the PROM file (your_prom_name.mcs), and writes the revision-to-physical-8MB-block-mapping information to the CFI file (your_prom_name.cfi).

To use PROMGen to create the MCS file for the Platform Flash XCFxxP PROM with design revisions, use the following new PROMGen command options:

-ver <revision #> <hexaddr> <bitstream1> <bitstream2>
Specifies the bitstream(s) assigned to a particular design revision, and the starting address. The "revision #" can be specified as "0", "1", "2", or "3". The "hexaddr" is the revision starting address in hexadecimal, and the bitstream data is loaded to increasing addresses (XCFxxP PROM hardware specification--Loading to decreasing addresses is not allowed when revisioning is used). Multiple ".bit" files are daisy-chained to form a single PROM file. Starting with 6.1isp3, hexadecimal start addresses are automatically inserted by PROMGen during PROM file generation.

-i <revision #>
Specifies the initial (default) design revision which is stored in the CFI file. During PROM programming, the default design revision is stored in the internal design revision selection register. The "revision #" can be specified as "0", "1", "2", or "3". The default is "0" if the option is not specified. This is the design revision that the PROM automatically downloads to the FPGA if this internal selection is not over-ridden by enabling the external design revision selection pins (REV_SEL[1:0]). The external pins are enabled by holding the /EN_EXT_SEL Low.

-z <revision #>
Specifies if compression will be used when generating the PROM data. The "revision #" can be specified as "0", "1", "2", or "3". When "-z" is used and a "revision #" is not specified, then all versions will be compressed. When "-z" is not used, compression is turned off.

Example
promgen -w -p mcs -c -o mypromfile -ver 0 first_v0.bit second_v0.bit -ver 1 first_v1.bit second_v1.bit -i 0 -x xcf32p -z

Explanation
This example creates an MCS file with two design revisions, targeting an XCF32P PROM (with 4 internal 8MB blocks):
- Revision 0 contains a daisy-chain with first_v0.bit and second_v0.bit
- Revision 1 contains a daisy-chain with first_v1 and second_v1.bit
- The default internal design revision register will be set to revision "0" in the CFI file
- The data in all design revisions is compressed

2

The Configuration Format File (.cfi) generated by iMPACT (PROMGen) stores the information needed to program the revision-capable PROMs correctly. The CFI file describes the data structure for the design revisions which are stored in the MCS file, as well as storing any additional options used (see below).

The CFI file is created by iMPACT when design revisioning is selected during file generation (in PROMGen this corresponds to the "-ver" switch being selected). One CFI file (.cfi) and one PROM file (.mcs) per PROM device is created, and the CFI file has the same root name as the output PROM file name. When the design or design set is split over multiple PROM devices, then the root name is expanded by an underscore followed by the PROM number (starting with PROM zero). For example, where "myprom" is specified as the output PROM file name and two PROMs are required, one MCS/CFI file pair is created for each PROM: myprom_0.mcs and myprom_0.cfi are paired, and myprom_1.mcs and myprom_1.cfi are paired

The contents of the CFI file are per the following specifications:

# comment line
DATE MM/DD/YYYY - HH:MM
SOURCE <associated MCS file name>
DEVICE <device type>
[SIGNATURE <signature value>]
[DEFAULT VERSION <V#>]
BLOCK 0 VERSION <V#> [COMPRESSED] [END] <checksum value> [DCM][DCI]
BLOCK 1 VERSION <V#> [COMPRESSED] [END] <checksum value> [DCM][DCI]
BLOCK 2 VERSION <V#> [COMPRESSED] [END] <checksum value> [DCM][DCI]
BLOCK 3 VERSION <V#> [COMPRESSED] [END] <checksum value> [DCM][DCI]

[SIGNATURE <signature value>] is a user specified signature field which can be programmed into the PROM to identify a particular design
[DEFAULT VERSION <V#>] indicates the intended default revision which will be programmed into the internal design revision register
[COMPRESSED] indicates that the data in the particular block was compressed during PROM file generation
[END] denotes the last block in any particular design revision, as design revisions can span several blocks
[DCM] or [DCI] indicates that one or more of the source FPGA bitstreams specified during the PROM file generation used either the DCM or DCI startup wait option (search for BitGen option help for more information). The PROM's CLKOUT output clock is used to indicate that the free-running clock option should be set during programming (allowing the PROM's clock to continue to run after the last bit in the design revision is clocked out). This allows the PROM to clock entire FPGA startup sequence when startup is delayed.

NOTE 1:
- XCF32P .cfi can contain up to four separate block lines describing BLOCK0, BLOCK1, BLOCK2, and BLOCK3.
- XCF16P .cfi can contain up to two separate block lines describing BLOCK0 and BLOCK1.
- XCF08P .cfi can contain one block line describing BLOCK0.

NOTE 2:
The [DCM] and [DCI] switches in the CFI file were not supported by iMPACT until 7.1i. When using software versions older than 7.1i to program the Platform Flash PROMs, the CFI file can be manually edited to remove the [DCM] and [DCI] switches.
AR# 17606
Date Created 07/11/2003
Last Updated 03/07/2007
Status Active
Type General Article