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AR# 17976

LogiCORE Gigabit Ethernet MAC v3.0 - A number of statistics counters are counting incorrectly some of the time

Description

Keywords: Gigabit, Ethernet, GEMAC, GMAC, MAC, statistics, stats, block RAM, Block RAM, BRAM, BlockRAM, RX_CLK, frames_received, bytes_received

Urgency: Standard

General Description:
The following problem occurs sporadically when a 1G MAC core is configured in CORE Generator to implement the statistics logic using block RAM:

While transmitting and receiving IDLE frames, the statistics counters count up when they should also be idle. As a result, the values stored in the counters (number of bad frames, frame length, etc.) are incorrect.

Solution

The statistics logic uses a shift register to reset the updates for the statistics data. This register is clocked by RX_CLK. If the RX_CLK input clock to the shift register becomes unstable, this can cause the shift register to contain invalid data, which results in erroneous statistics.

A patch for v3.0 of the GMAC core fixes this issue by inserting a clock recovery circuit in front of the shift register. To resolve this issue, please install the patch, which is available in the Release Notes: (Xilinx Answer 17129).

This is also resolved in GMAC v4.0 core.
AR# 17976
Date Created 09/08/2003
Last Updated 08/31/2006
Status Archive
Type General Article