Why are package flight time for wire-bond packages not available?
For high-speed applications, it has been standard design practice to use Flip-Chip packages over wire-bonded ones. The I/O trace lengths in the substrate affect performance, especially in high-speed applications.
This stems from the current path between the die and the substrate balls. The electrical delay of the Flip-Chip substrate traces are much easier to predict than those of wire-bonded package wires.
In high-speed design applications, these delays could be quite significant, so they must be included in performance analysis models.
The Flip-Chip packages have a structural arrangement that makes delays associated with these traces very predictable within reasonable tolerance. Some newer bond wire packages do have flight time associated with them.