For a PL3 design, timing fails the OFFSET constraints on the PL3 signals when running with ISE 6.1.01 or earlier software.
Timing passes on all constraints when using service pack 2 of ISE 6.1.
Phase shift constraints can be added to the DCM signals, Rx and Tx as follows:
INST "TFClkDCM" CLKOUT_PHASE_SHIFT = FIXED;
INST "TFClkDCM" PHASE_SHIFT = 40;
INST "RFClkDCM" CLKOUT_PHASE_SHIFT = FIXED;
INST "RFClkDCM" PHASE_SHIFT = 40;
The actual phase shift values are system dependent and will likely need to be changed to reflect the user system.