When I try to connect a signal using the following syntax in my MHS file:
PORT B = mysig
I receive the following error message:
"ERROR:MDT - ...\system.mhs line xx Invalid Signal name sig_name -- PlatGen doesn't support vector slicing."
It is not valid to splice a signal into smaller signals using [ ] notation. Use signal concatenation (&) operator or util_bus_split IP instead.
util_bus_split IP can be found in the following location:
This core splits a bus into individual signals.
PORT A = mysig # a 2-bit signal
PORT B = mysig # invalid syntax 
PORT C = mysig
PORT A = mysig_0 & mysig_1
PORT B = mysig_0
PORT C = mysig_1
mysig_0 and mysig_1 are the outputs from an instance of util_bus_split core.
Refer to (Xilinx Answer 19133) for additional information.