We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 18404

LogiCORE Gigabit Ethernet MAC 1000BASE-X PCS/PMA - Guidelines for implementing Gigabit Ethernet MAC on ML300 board


General Description: 

Are there any guidelines for using the Gigabit Ethernet MAC with the 1000BASE-X PCS/PMA interface on the ML300 board?


When using the GMAC with the 1000BASE-X PCS/PMA interface on the ML300 board, you need to consider the following: 


- MDIO_IN input must be tied to '1' if unused as stated in the "MDIO Interface Signal Pinout" table of the data sheet. 


- The Isolate bit in the PCS/PMA core must be set to '0' via the Host Interface of the GMAC. Otherwise, the GMAC is 'isolated' from the PCS/PMA and the MGT, and nothing will go in or out of the FPGA device if this bit is set. The isolate bit defaults on power-up to '1' as defined in the IEEE spec. 


- If using Synplify, a /* synthesis syn_noclockbuf = 1 */ constraint is required to keep it from inferring a BUFG on clocks output from the GMAC.

AR# 18404
Date Created 09/03/2007
Last Updated 05/16/2014
Status Archive
Type General Article