When I am synthesizing a design with XST, the following warning occurs:
"WARNING:Xst:1426 - The value init of the FF/Latch <my_flop> hinders the constant cleaning in the block <my_block>.
You should achieve better results by setting this init to 0."
This warning occurs when a register with an INIT value (the initialization value that a memory element has when the FPGA is powered on) has a constant input that does not match the INIT value and no other control signal (such as a local set/reset). The constant input might be due to an undriven input or logic optimization.
To avoid the warning, examine the logic value and/or trimming at the input signal of the register. If the values of the input and INIT match, XST will be able to optimize the registers using constant optimization.
For more information about INIT please refer to the Constraints Guide:
For more information on inferring INIT values in HDL, please refer to (Xilinx Solution 15149).