Verify fails for a design that utilizes SRL16 or LUT RAM (Distributed RAM), even though the design functions correctly.
This problem has been fixed in the latest 6.2i Service Pack, available at:
http://support.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is 6.2i Service Pack 1.
For work-arounds prior to 6.2i Service Pack 1, please contact Xilinx Technical Support at:
http://support.xilinx.com/support/techsup/tappinfo.htm