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AR# 19326

6.2 EDK/EST/XPS - List of EDK simulation Answer Records


Keywords: EDK, Simulation, behavioral, structural, timing, platform, studio, XPS, ModelSim, NCSim, PPC, PowerPC, MicroBlaze

Urgency: Standard

General Description:
What Answer Records are available for my EDK simulation questions?

The Answer Records below describe steps for simulating EDK designs as well as know issues regarding EDK project simulation.


Tips for simulating an EDK project:

(Xilinx Answer 16166) - 6.1 EDK/EST/XPS - My processor system is not my top-level design; how do I perform a behavioral simulation?

(Xilinx Answer 16359) - 3.1/3.2 EDK - Does EDK support the ModelSim XE simulator?

(Xilinx Answer 17013) - 6.2 / 6.1 EDK - Is there a way to add the PowerPC registers, included in the SmartModel, to my simulation?

(Xilinx Answer 17729) - 6.2 / 6.1 EDK - SimGen: How do I write a "do" file to run the simulation after I run the "system.do" file (ModelSim) (SimGen) (EST)?

(Xilinx Answer 17873) - 6.2 / 6.1 EDK - SimGen - When I run a behavioral simulation of my processor system with my test bench, the processor does not run any instructions.

(Xilinx Answer 18243) - 6.1 EDK - When behaviorally simulating a MicroBlaze system, "microblaze_isa_be_pkg.vhd(1): near "xlxv35eb": syntax error"

(Xilinx Answer 18386) - 6.1 Compedklib - How do I compile the behavioral models for EDK Simulation in EDK 6.1?

Known issues:

(Xilinx Answer 18769) - 6.2 / 6.1 EDK/SimGen - SimGen produces incorrect "system_init.v" file for Verilog simulations.
AR# 19326
Date Created 04/14/2004
Last Updated 04/09/2007
Status Archive
Type General Article