UPGRADE YOUR BROWSER

We have detected your current browser version is not the latest one. Xilinx.com uses the latest web technologies to bring you the best online experience possible. Please upgrade to a Xilinx.com supported browser:Chrome, Firefox, Internet Explorer 11, Safari. Thank you!

AR# 19332

6.2i XST Virtex-II Pro X RocketIO X - Transceiver design in VHDL does not function (TXOUTCLK is not produced)

Description

Keywords: PMA_PWR_CNTRL

Urgency: Hot

General Description:
My VHDL design does not work in hardware; the TX serial pins do not toggle.

Solution

XST incorrectly writes the PMA_PWR_CNTRL register as "FF" instead of "11111111". You can work around this problem by setting the PMA_PWR_CNTRL in the UCF file to override the setting in the NGC file created by XST.

Example UCF Entry:
INST "GT10_CUSTOM_INST" PMA_PWR_CNTRL="11111111";

A Change Request has been filed for this issue.

This problem has been fixed in the latest 6.2i Service Pack available at:
http://support.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is 6.2i Service Pack 3.
AR# 19332
Date Created 04/15/2004
Last Updated 07/18/2007
Status Archive
Type General Article