General Description:
When I attempt to pin-assign an I/O to pin 24 for the CoolRunner-II XC2C32-PC44, pin 24 does not appear as a valid I/O. For example, I can create a project with XC2C32 PC44 and try to assign an input to pin 24; however, PACE reports that the pin does not exist. If I use the UCF instead to assign the signal to P24, it works. ChipViewer also does not show the pin.
I used the following code for the test:
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
-- Uncomment the following lines to use the declarations that are
-- provided for instantiating Xilinx primitive components.
--library UNISIM;
--use UNISIM.VComponents.all;
entity erer is
port ( CLK: in STD_LOGIC;
RESET: in STD_LOGIC;
CE, LOAD, DIR: in STD_LOGIC;
DIN: in STD_LOGIC_VECTOR(3 downto 0);
COUNT: inout STD_LOGIC_VECTOR(3 downto 0));
end erer;
architecture Behavioral of erer is
begin
process (CLK, RESET)
begin
if RESET='1' then
COUNT <= "0000";
elsif CLK='1' and CLK'event then
if CE='1' then
if LOAD='1' then
COUNT <= DIN;
else
if DIR='1' then
COUNT <= COUNT + 1;
else
COUNT <= COUNT - 1;
end if;
end if;
end if;
end if;
end process;
end Behavioral;
This problem has been fixed in the latest 6.2i Service Pack available at:
http://support.xilinx.com/xlnx/xil_sw_updates_home.jsp
The first service pack containing the fix is 6.2i Service Pack 3.