How do I back-annotate the SDF file for timing simulation using NC-VHDL?
For timing simulation the "SDF" file will need to be compiled and then added to the ncelab line.
To compile the "SDF", run the command:
This will write out a "<name_of_sdf_file>.X" file, which is a compiled "SDF" file. If a compiled file exists, NCSDFC checks to make sure that the date of the compiled file is newer than the date of the source file and that the version of the compiled file matches the version of NCSDFC.
Then, in the ncelab stage there is a switch -SDF_CMD_FILE <file_name>, which expects a command file for the "SDF" file.
A sample SDF_CMD_FILE is provided below.
// SDF command file sdf_cmd1
COMPILED_SDF_FILE = "dcmt_timesim_vhd.sdf.X",
SCOPE = :uut,
MTM_CONTROL = "TYPICAL",
SCALE_FACTORS = "1.0:1.0:1.0",
SCALE_TYPE = "FROM_MTM";
// END OF FILE: sdf_cmd
Please see (Xilinx Answer 19446) for information on running a timing simulation in NC-VHDL