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AR# 19458

6.2.02i ECS - SCH2VHDL incorrectly instantiates a GND component when connected to a ROM in a schematic

Description

Keywords: 6.2, VHF, VHDL, code, conversion

Urgency: Standard

Description:
When connecting a GND symbol to the port ADDR[0:0] of a ROM symbol, the Schematic to VHDL converter (sch2vhdl) creates incorrect VHDL.

An example of the code created in the intermediate ".vhf" file is below:
----------------------------------------------------------------------------------------------------------------------------------
XLXI_33 : rom_ver
port map (ADDR(0)=>XLXN_26(0), CLK=>CLK30_INT, DOUT(15 downto 0)=>XLXN_25(15 downto 0));

XLXI_34 : GND
port map ((5611530 downto 1242820)=>XLXN_26(0));
----------------------------------------------------------------------------------------------------------------------------------

Solution

The VHF file can be corrected by editing the ".vhf" file as shown below:
----------------------------------------------------------------------------------------------------------------------------------
XLXI_33 : rom_ver
port map (ADDR(0)=>XLXN_26(0), CLK=>CLK30_INT, DOUT(15 downto 0)=>XLXN_25(15 downto 0));

XLXI_34 : GND
port map (G =>XLXN_26(0));

----------------------------------------------------------------------------------------------------------------------------------

The Synthesis now complete successfully.

Notice that the VHF file already contained the correct GND component declaration:

-----------------------------------------------------
component GND
port ( G : out std_logic);
end component;
----------------------------------------------------
AR# 19458
Date Created 05/19/2004
Last Updated 01/08/2006
Status Archive
Type General Article